Capacitors are the basic energy storage devices in random access memory devices, such as dynamic random access memory (DRAM) devices, static random access memory (SRAM) devices, and ferroelectric random access memory (FeRAM) devices. Capacitors store electric charge; a charged capacitor is represented by a 1 and a discharged capacitor by a 0. They consist of two conductors, such as parallel metal or polysilicon plates, which act as the electrodes (i.e., the storage node electrode and the cell plate capacitor electrode), insulated from each other by a dielectric material.
As memory devices increase in memory cell (i.e., storage cell or storage node) density, it is necessary to decrease the size of circuit components, such as capacitors. Thus, there is a continuing challenge to maintain sufficiently high storage capacitance while decreasing cell area. It is desirable that each capacitor possess as much capacitance as possible. Preferably, they should possess at least about 20.times.10.sup.-15 farads, and more preferably, at least about 60.times.10.sup.-15 farads, of charge storage capacity. If a capacitor exhibits too little capacitance, it will lose charge placed upon it too rapidly, thereby causing errors in data storage.
The capacitance of a capacitor is dependent upon the dielectric constant of the material placed between the plates of the capacitor, the distance between the plates, and the effective area of the plates. One way to retain (or even increase) the storage capacity of a random access memory device and decrease its size is to increase the dielectric constant of the dielectric layer of the storage cell capacitor. For example, in order to achieve the charge storage efficiency in 256 megabit (Mb) memories and above, materials having a high dielectric constant, typically greater than about 10, can be used as the dielectric layer between the two electrodes. The dielectric constant is a value characteristic of a material and is proportional to the amount of charge that can be stored in the material when it is interposed between two electrodes. It is the ratio of the capacitance of a capacitor filled with a given dielectric material to that of the same capacitor having only a vacuum as the dielectric.
Examples of high dielectric constant materials are metal oxides such as TiO.sub.2, WO.sub.2, Ta.sub.2 O.sub.4, Ta.sub.2 O.sub.5, and Al.sub.2 O.sub.3. These materials have dielectric constants above 10. Metal oxides and metal salts such as Ba.sub.x Sr(.sub.1-x)TiO.sub.3 [BST], BaTiO.sub.3, SrTiO.sub.3, PbTiO.sub.3, Pb(Zr,Ti)O.sub.3 [PZT], (Pb,La)(Zr,Ti)O.sub.3 [PLZT], (Pb,La)TiO.sub.3 [PLT], KNO.sub.3, and LiNbO.sub.3 have even higher dielectric constants. These materials have dielectric constants above 50. By comparison, Si.sub.3 N.sub.4 and SiO.sub.2 /Si.sub.3 N.sub.4 composite films, which are often used in 256 kilobits (Kb) to 64 megabits (Mb) generations of DRAMs, have dielectric constant values of 7 or less.
Unfortunately, high dielectric constant materials are generally incompatible with existing chip manufacturing processes and cannot be simply deposited on a polysilicon electrode as is the case for the lower dielectric constant materials, such as Si.sub.3 N.sub.4 and SiO.sub.2 /Si.sub.3 N.sub.4 composite layers. For example, these high dielectric materials often form pinholes upon deposition. This incompatibility is believed to be a result of the oxygen rich atmosphere present during the deposition and/or during annealing steps. The O.sub.2 oxidizes portions of the materials used for the storage node plate. Also, the capacitors employing standard storage node plate materials undergo physical degradation during thermal cycles due to the diffusion of the cell plate material into the dielectric material.
One means by which these problems can be overcome, at least in part, is through the use of a storage node electrode that consists of a layer of nonoxidizing conductive material such as platinum overlying a barrier layer made of tantalum or titanium nitride, for example, which overlies a conductive plug such as a polysilicon plug. See, U.S. Pat. No. 5,392,189 (Fazan et al.). Although this is an effective technique, other techniques are needed that allow for the effective use of high dielectric materials in integrated circuits.